System-on-a-Chip for FPGA, with xr16 RISC core and LCC port
OTHER License
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xv6 OS
Xv6 for RISC-V
A very simple and easy to understand RISC-V core.
RISC-V (32-bit) emulator, in C89
A transformable CPU, one version using FPGA technology and another using an ARM Cortex-M4 (K64F) ...
mirror of the source code of the Xv6 operating system
Configure Xilinx Spartan-6 FPGA using Texas Instruments ARM MCU
VexRiscV system with GDB-Server in Hardware
GCC for 16-bit x86 forked for ELKS. Upstream: tkchia/gcc-ia16 and crtc-demos/gcc-ia16
Port of xv6 operating system to Nyuzi processor
Envision a future where every student can read all the code of a teaching operating system.