VeriEMU

This is a test playground for testing various Verilog cores. Code will not be synced with MAME in future and main purpose is to use MAME code as testing framework.

It is based on MAME 0.194 release and use corresponding ROMs.

MAME team is not responsible for code here so please do not contact them related to this project, but use local issues.

License

All Verilog files and scripts release here as addition to MAME code will be free for personal and commercial user and licensed under MIT as most liberal license (https://opensource.org/licenses/MIT), this could be change in future for some more perimissive license when hardware designers agree to some.

License of MAME project

The MAME project as a whole is distributed under the terms of the GNU General Public License, version 2 or later (GPL-2.0+), since it contains code made available under multiple GPL-compatible licenses. A great majority of files (over 90% including core files) are under the BSD-3-Clause License and we would encourage new contributors to distribute files under this license.