sv-json-schema

This is a SystemVerilog configuration class generation -- from JSON schema -- utility.

MIT License

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sv-json-schema

This is a tool to generate a SystemVerilog configuration class from a schema specification of the data. The data format is JSON.

Introduction

Given a JSON schema specification of data, the tool produces a systemverilog class which when instantiated as an object can read and parse a JSON data file(conforming to the specified schema), dump a JSON file of the its representation and randomize its data in the specified constrained manner.

The json schema library used is statham-schema. The SystemVerilog serializer deserializer comes from JSONinSV.

Reference

  1. statham-schema
  2. JSONinSV
  3. JSON Schema

Development

  1. Clone the repository: git clone https://github.com/mpatil/sv-json-schema.git && cd sv-json-schema
  2. Initialise git submodules: git submodule update --init --recursive
  3. Install the requirements: pip install -r requirements.txt
  4. Setup simulator env. Only mentor questa supported right now.
  5. Run the default generation: make
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