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Published by AntonLydike 5 months ago
x0 -> zero
or fp -> s0
.fcvt.d.w[u]
and fcvt.w[u].d
instructionsM
extensionmulh
jalr
(You can also read the Changelog.md file in this release)
Full Changelog: https://github.com/AntonLydike/riscemu/compare/v2.2.5...v2.2.6
Published by AntonLydike about 1 year ago
Full Changelog: https://github.com/AntonLydike/riscemu/compare/v2.2.4...v2.2.5
Published by AntonLydike about 1 year ago
ft8
to ft11
)Full Changelog: https://github.com/AntonLydike/riscemu/compare/v2.2.3...v2.2.4
Published by AntonLydike about 1 year ago
-o libc
would fail with packaged versions of riscemu__all__
to now properly work (use name strings instead of values)Full Changelog: https://github.com/AntonLydike/riscemu/compare/v2.2.2...v2.2.3
Published by AntonLydike about 1 year ago
__all__
to riscemu.{core,instructions,decoder}
modules to make pyright in other projects happyFull Changelog: https://github.com/AntonLydike/riscemu/compare/v2.2.1...v2.2.2
Published by AntonLydike about 1 year ago
This is a release to test if pythonpublish.yml works now. :/
Published by AntonLydike about 1 year ago
.p2align
assembler directivebeq a0, a1, 1b
and beq a0, a1, -16
can both can be handled correctly.Full Changelog: https://github.com/AntonLydike/riscemu/compare/v2.1.1...v2.2.0
Published by AntonLydike about 1 year ago
Full Changelog: https://github.com/AntonLydike/riscemu/compare/v2.1.0...v2.1.1
Published by AntonLydike over 1 year ago
Changes:
crt0.s
, and a few functions such as malloc
, rand
, and memcpy
.mmap2
syscall (code 192) to allocate new memory-o libc
Published by AntonLydike over 1 year ago
Bugfixes:
rd rs rs
type instructionsconf.debug_instruction = False
to supress debug instructionsPublished by AntonLydike over 2 years ago
In this release:
Published by AntonLydike over 2 years ago
In this release:
Published by AntonLydike over 2 years ago
In this release:
See this release on PyPI: https://pypi.org/project/riscemu/2.0.0/