ChiselGPU

Experiments with fixed function renderers and Chisel HDL

APACHE-2.0 License

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Ecosystems: Scala

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[AFK] Hardware router in Chisel (THU Network Joint Lab 2020)

Chisel examples shown for different programming paradigms

Open-source high-performance RISC-V processor

Rocket Chip Generator

Learning how to make RISC-V 32bit CPU with Chisel

Chisel: A Modern Hardware Design Language

A Chisel3 package to describe verilog FPGA template and macro for hardened FPGA modules