fpgamacro

A Chisel3 package to describe verilog FPGA template and macro for hardened FPGA modules

Stars

Ecosystems: Scala

Statistics for this project are still being loaded, please check back later.

Annotation to automatically delegate/proxy implementation of interface to dependency

Scala of Markdown: http://daringfireball.net/projects/markdown

Scala CLI is a command-line tool to interact with the Scala language. It lets you compile, run, t...

HDMI core in Chisel HDL

HDMI interface for GameBoy DMG

Chisel: A Modern Hardware Design Language

Rocket Chip Generator

Experiments with fixed function renderers and Chisel HDL

Open-source high-performance RISC-V processor

Chisel examples shown for different programming paradigms

Learning how to make RISC-V 32bit CPU with Chisel

[AFK] Hardware router in Chisel (THU Network Joint Lab 2020)