This is a demonstration of how to integrate the SUMP2 Logic Analyzer into an existing FPGA design to allow direct capture of internal signals. For a more detailed explanation, see the project page.
A microcontroller that natively executes a simple LISP dialect
MyHDL hardware design language encased in the tasty PygMyHDL wrapper.
A mixed-signal test project on Tiny Tapeout
Some utilities to wrap the sigrok project's python analyzers to be used in Saleae Logic 2.x
Minimal microprocessor
List of awesome open source hardware tools, generators, and reusable designs
Drive a Wishbone master bus with an SPI bus.