Chisel: A Modern Hardware Design Language
APACHE-2.0 License
Scala 2 compiler and standard library. Bugs at https://github.com/scala/bug; Scala 3 at https://g...
Scala library for boilerplate-free, type-safe data transformations
Experiments with fixed function renderers and Chisel HDL
srp <> scala-repl-pp <> a better Scala 3 REPL
Rocket Chip Generator
better implicit errors for scala
[AFK] Hardware router in Chisel (THU Network Joint Lab 2020)
Learning how to make RISC-V 32bit CPU with Chisel